发明名称 Shaper circuit and shaper circuit combination
摘要 A shaper circuit includes a storage part storing a current token, an add token, and a max token, a subtraction part subtracting a packet length of a dequeue target from the current token stored in the storage part and storing the current token in the storage part, an addition part adding the add token stored in the storage part to the current token stored in the storage part at constant periodic intervals and storing the current token in the storage part, a comparison part comparing the result of the addition with the max token stored in the storage part and preventing the addition result from exceeding the max token, and a determining part outputting a dequeue permission request. A number of bits in a decimal part of the current token are set and a number of bits in an integer part of the add token are set.
申请公布号 US7778174(B2) 申请公布日期 2010.08.17
申请号 US20060448923 申请日期 2006.06.07
申请人 FUJTISU LIMITED 发明人 OHTA YOKO;IMAMURA KATSUMI;KUROKAWA YASUSHI;FUKUNAGA HIDEYO
分类号 H04J1/16 主分类号 H04J1/16
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