BIT LINE VOLTAGE CONTROL IN SPIN TRANSFER TORQUE MAGNETORESISTIVE RANDOM ACCESS MEMORY

摘要

A Spin Transfer Torque Magnetoresistive Random Access Memory (STT- MRAM) and associated read operations are disclosed. A bit cell includes a magnetic tunnel junction (MTJ) and a word line transistor, the bit cell being coupled to a bit line and a source line. A clamping circuit is coupled to the bit line and is configured to clamp the bit line voltage to a desired voltage level during a read operation of the STT- MRAM to prevent the bit line voltage from exceeding the desired voltage level. The desired voltage level is less than a write voltage threshold associated with a write operation of the STT-MRAM.