POWER MANAGEMENT CHIP FURNISHED WITH VOLTAGE CONTROLLER

摘要

The present invention relates to a power management chip (Power Management IC) and particularly to a power management chip with a built-in EEPROM furnished with a voltage controller wherein the voltage required for the recording operation or erase operation of the EEPROM is not supplied by using a separate external voltage source or a high voltage generation circuit but instead by controlling the voltage naturally produced by system operation, so that the number of external terminals and the size of the chip may be reduced.