发明名称 CONTROLLER FOR MEMORY MODULE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a memory controller for a memory module having a function of determining timing of a received clock signal and a strobe signal and outputting a result of the determination, the memory controller effectively utilizing the function. <P>SOLUTION: The present invention relates to a controller 1 for a memory module of the DDR3 standard memory, including: a master DLL 30 which outputs a delay control signal for controlling delay of a signal inputted from the memory module; a strobe signal control section 40 for delaying the strobe signal and outputting it as a delay strobe signal; and a data signal control section 50 for delaying a data signal and outputting it as a delay data signal. <P>COPYRIGHT: (C)2010,JPO&INPIT</p>
申请公布号 JP2010171826(A) 申请公布日期 2010.08.05
申请号 JP20090013637 申请日期 2009.01.23
申请人 RICOH CO LTD 发明人 WATABE YUJI
分类号 H03K5/00;G06F1/06;H03K5/135 主分类号 H03K5/00
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