| 摘要 |
A high frequency semiconductor device (25) includes: a field effect transistor (24) including gate terminal electrodes (G1-G10), source terminal electrodes (S1-S11), and a drain terminal electrode (D); an input circuit pattern (17) and an output circuit pattern (18) which are disposed adjoining of the field effect transistor; a plurality of input bonding wires (12,12L) configured to connect the plurality of the gate terminal electrodes (G1-G10) and the input circuit pattern (17); and a plurality of output bonding wires (14,14L) configured to connect the drain terminal electrode (D) and the output circuit pattern (18), whereby the input/output signal phase is matched by adjusting an inductance distribution of a plurality of input/output bonding wires, and whereby gain and output power is improved, and whereby an oscillation due to unbalanced operation of each FET cell is supressed. |
