发明名称 |
MUTI-LEVEL-CELL NON-VOLATILE MEMORY DEVICE OF 3-DIMENSIONAL STRUCTURE USING CHARGE TRAPPING REGION AND METHOD OF MANUFACTURING THE SAME |
摘要 |
<p>PURPOSE: A multi-level-cell nonvolatile memory device with a 3D structure and a manufacturing method thereof are provided to sufficiently increase the area of a channel region by forming a recess part with a 3D structure on an active region inside a unit cell. CONSTITUTION: The depression of a reverse pyramid type is formed on an active region of a semiconductor substrate. Three source/drain regions(105a-105d) or more are formed on the semiconductor substrate outside the depression unit per unit cell. A tunneling insulation layer(110) is formed on the inner wall of the depression. A charge trap region is formed on the tunneling insulation layer inside the depression and stores charges. A blocking insulation layer is formed on the charge trap region. A common gate electrode is formed on the blocking insulation layer.</p> |
申请公布号 |
KR20100086867(A) |
申请公布日期 |
2010.08.02 |
申请号 |
KR20090006312 |
申请日期 |
2009.01.23 |
申请人 |
INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY |
发明人 |
LEE, TAE YOON;SEO, JUNG MOK |
分类号 |
H01L21/8247;H01L27/115 |
主分类号 |
H01L21/8247 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|