| 摘要 |
In at least one hardware definition language (HDL) file, at least one design entity containing a functional portion of a digital system is specified. The design entity logically contains a latch having a respective plurality of different possible latch values. With one or more statements in one or more files, a configuration entity is associated with the latch. The configuration entity has a plurality of different settings and each setting reflects which of the plurality of different possible values is loaded in the associated latch. A controlling value set for at least one instance of the configuration entity is also defined in one or more files. The controlling value set indicates at least one controlling value for which presentation of a current setting of the configuration entity instance is restricted. Thereafter, in response to a request to present at least a partial state of the digital system, a current setting of the configuration entity instance is excluded from presentation by reference to a configuration database indicating the controlling value set.
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