| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device of high performance and low threshold voltage, and its manufacturing method. SOLUTION: The device has: an isolation region which is formed on a substrate and insulates and isolates an NMOS formation region wherein an NMOS transistor is formed and a PMOS formation region wherein a PMOS transistor is formed; a gate insulating film of NMOS and PMOS formed of a High-k material formed on the substrate; an NMOS gate electrode formed on the gate insulating film of the NMOS; a PMOS gate electrode which has a first nickel silicide layer formed on the PMOS gate insulating film and a second nickel silicide layer which is formed on the first nickel silicide layer and is thicker than the first nickel silicide layer and has a larger nickel density than the first nickel silicide layer; and a sidewall spacer which is formed in a sidewall of the NMOS gate electrode and the PMOS gate electrode. COPYRIGHT: (C)2010,JPO&INPIT
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