发明名称 Connection error avoidance for apparatus connected to a power supply
摘要 According to a first general aspect of the present invention, there is provided a logic arrangement for reducing incidence of errors in connections between a power consumer apparatus and a power supply apparatus, the logic arrangement comprising: a pattern-generating component for generating an identifiable pattern in a load to be drawn from a power supply connection to a power supply apparatus; and a testing component for monitoring across a signal connection to the power supply apparatus, the testing component monitoring for a change in the load corresponding to the pattern. A positive result of the testing by the testing component indicates a correct configuration. Additional embodiments are also presented.
申请公布号 US7759820(B2) 申请公布日期 2010.07.20
申请号 US20070836065 申请日期 2007.08.08
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 HYATT STEVEN JOHN;JUDD IAN DAVID;NICHOLSON ROBERT BRUCE;OUELCH PAUL JONATHAN;RANDLE STEPHEN ARTHUR;SCALES WILLIAM JAMES
分类号 H02J9/00;G06F11/22 主分类号 H02J9/00
代理机构 代理人
主权项
地址