| 摘要 |
PURPOSE: An oscillator is provided to generate a multi phase clock using a complementation fully differential amplifier, thereby reducing power consumption. CONSTITUTION: The first complementation fully differential amplifier outputs the first output signal(OUT) which complementarily and differentially amplifies signals applied to the first input terminal and the second input terminal. The second complementation fully differential amplifier outputs the second output signal(OUTB) which has a completely different differential phase from the first output signal by completely and differentially amplifying signals applied to the third input terminal and the fourth input terminal. An output terminal of the first complementation fully differential amplifier is connected to the third and fourth input terminals of the second complementation fully differential amplifier. An output terminal of the second complementation fully differential amplifier is connected to the first and second input terminals of the first complementation fully differential amplifier. The first complementation fully differential amplifier and the second complementation fully differential amplifier have the same structure or the same amplifying performance.
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