发明名称 EEPROM having single gate structure
摘要 An electrically erasable programmable read-only memory (EEPROM) includes an access transistor having a floating gate and source/drain regions formed at opposite sides of the floating gate in a first well, a first well tap formed in the first well, a control gate located on a second region, first impurity regions formed at both sides of the control gate in the second region, and a second well tap formed in a third region. In order to erase information stored in a memory cell, a predetermined erasing voltage is applied to the source/drain regions of the access transistor and the first well tap, a ground voltage is applied to the first impurity regions in the second region, and a voltage, which is greater than 0V and less than a junction breakdown voltage between the active area and the first well, is applied to the second well tap.
申请公布号 US7755135(B2) 申请公布日期 2010.07.13
申请号 US20070682619 申请日期 2007.03.06
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 YOO SEUNG-HAN;CHANG HOON
分类号 H01L29/788 主分类号 H01L29/788
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