| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an information processor capable of quickening DMA transfer to an I/O buffer, and an image data recording system. Ž<P>SOLUTION: This information processor 1 includes an internal bus 40, a DMA controller 20 for transferring a data from a transferring side resource to a transferred side resource, and an I/O controller 30 including an FIFO 320 (I/O buffer), and for transferring a data between the FIFO 320 and an external device 100. The DMA controller selects either of continuous reading-out of a plurality of data from the FIFO 320, or reading-out of one piece of data therefrom, in one data transfer request from the I/O controller, when the transferring side resource is the I/O controller, and selects either of continuous writing-in of a plurality of data into the FIFO 320, or writing-in of one piece of data thereinto, in the one data transfer request from the I/O controller, when the transferred side resource is the I/O controller. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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