| 摘要 |
PURPOSE: The test pattern of a semiconductor device and a method for fabricating the same are provided to prevent the malfunction of the semiconductor device by recognizing a mis-overlaid gate pattern on an active region. CONSTITUTION: A gate pattern(120) is overlaid on an active region(110). Based on the gate pattern, the left area of the active region is different from the right are of the active region. A first metal pattern and a second metal pattern are connected with both sides of the gate pattern. A measuring unit(140) measures the current of the gate pattern in contact with the active region. Whether the measured current is not the same as a pre-set reference value, the mis-overlaid gate pattern on the active region is recognized.
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