发明名称 Method and apparatus to prevent high voltage supply degradation for high-voltage latches of a non-volatile memory
摘要 An improved cross-coupled CMOS high-voltage latch that is used for storing data bits to be written to memory cells of a non-volatile memory is provided with a switching circuit that, during writing of data bits into the memory cells of the latch, provides a high series impedance between one leg of the latch and ground to limit leakage current. A large number of latches are connected in parallel and their accumulated leakage currents are limited by the switching circuit to prevent overload of a high-voltage generator, such as a charge pump circuit, for the high-voltage latch, so that data can be properly written in the memory cells of the non-volatile memory.
申请公布号 US7751256(B2) 申请公布日期 2010.07.06
申请号 US20070933805 申请日期 2007.11.01
申请人 ATMEL CORPORATION 发明人 CHAN JOHNNY;SON JINSHU
分类号 G11C7/10 主分类号 G11C7/10
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