发明名称 METHOD FOR TESTING AN ADDRESS BUS IN A LOGIC MODULE
摘要 The invention relates to a method for testing an address bus (14) in a logic module (10), to a logic module (10), a computer program, and a computer program product. The method disclosed provides that at least one data register is provided in a logic module (10), the addresses recognized by the address decoder (18) being written into said data register.
申请公布号 KR20100075916(A) 申请公布日期 2010.07.05
申请号 KR20107008075 申请日期 2008.09.10
申请人 ROBERT BOSCH GMBH 发明人 SCHNEIDER THOMAS;WIRTH PETER;PFITZER OTTO
分类号 G06F11/26;G06F11/267 主分类号 G06F11/26
代理机构 代理人
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