| 摘要 |
PURPOSE: A method for manufacturing a flash memory device is provided to reduce the generation of a step difference during a gate patterning process by forming an etching stop layer with a high dielectric constant between a control gate layer and a metal layer. CONSTITUTION: A gate insulating layer, a first conductive layer, a dielectric layer(406), a second conductive layer, an etching stop layer, a metal layer, and a hard mask layer are successively formed on a semiconductor substrate. The hard mask layer and the metal layer are patterned to form a hard mask pattern(414a) and a metal pattern(412a). Remained impurities are eliminated, and an exposed etching stop layer through the hard mask pattern is patterned. The second conductive layer, the dielectric layer, and the first conductive layer are patterned to form a second conductive pattern, a dielectric pattern, and a first conductive pattern.
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