| 摘要 |
An operational amplifier capable of suppressing power consumption and noise generation includes an offset modifier including a differential amplification circuit, and an offset memory for storing an offset voltage using a latch circuit. The differential amplification circuit includes first and second NMOS transistors connected to an input terminal, first and second PMOS transistors respectively connected to drains of the first and second NMOS transistors, a third NMOS transistor connected to sources of the first and second NMOS transistors, a third PMOS transistor connected to a source of the second PMOS transistor, a fourth NMOS transistor connected to the third PMOS transistor, to form an output to be applied to the offset memory, and left and right modification blocks each connected to an associated one of the first and second NMOS transistor in parallel.
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