| 摘要 |
A phase locked loop circuit is provided comprising a voltage controlled oscillator (VCO), frequency divider, phase frequency detector (PFD), charge pump, waveform generator, loop filter, switching circuit, and lock detector. The VCO generates an oscillation signal. The frequency divider multiplies the frequency of the oscillation signal. The PFD compares the frequency-multiplied oscillation signal and an externally inputted reference signal to generate an error signal. The charge pump generates a signal according to the error signal. The loop filter controls the VCO to modulate the frequency of the oscillation signal and generate a spread spectrum clock based on the signal of the charge pump or waveform generator. The lock detector controls the switching circuit to selectively connect the charge pump to the loop filter during a non-lock state and the waveform generator to the loop filter during a lock state.
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