发明名称 |
POST HIGH-K DIELECTRIC/METAL GATE CLEAN |
摘要 |
A method for fabricating a CMOS integrated circuit (IC) includes the step of providing a substrate having a semiconductor surface. A gate stack including a metal gate electrode on a metal including high-k dielectric layer is formed on the semiconductor surface. Dry etching is used to pattern the gate stack to define a patterned gate electrode stack having exposed sidewalls of the metal gate electrode. The dry etching forms post etch residuals some of which are deposited on the substrate. The substrate including the patterned gate electrode stack is exposed to a solution cleaning sequence including a first clean step including a first acid and a fluoride for removing at least a portion of the post etch residuals, wherein the first clean step has a high selectivity to avoid etching the exposed sidewalls of the metal gate electrode. A second clean after the first clean consists essentially of a fluoride which removes residual high-k material on the semiconductor surface.
|
申请公布号 |
US2010167519(A1) |
申请公布日期 |
2010.07.01 |
申请号 |
US20080344421 |
申请日期 |
2008.12.26 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
KIRKPATRICK BRIAN K.;CHOI JINHAN;RILEY DEBORAH J. |
分类号 |
H01L21/3205;H01L21/461 |
主分类号 |
H01L21/3205 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|