| 摘要 |
A novel high speed, >1 GHz or 2 Gbits/s, low voltage differential signal (LVDS) driver is disclosed. The LVDS design achieves low power consumption while providing LVDS compliant impedance termination to power supply and ground. An output stage of the LVDS is implemented using a Nmos and a Pmos follower in a push pull configuration. This new design relies first on a follower type of an output stage, which provides the inherent impedance termination, second on an AC, capacitive, coupling and DC restoration to drive output stage gates, and on a low power dummy bias generator that supplies DC restoration voltages. As the supply voltage is lower the thick oxide devices performance suffer, therefore for this new design is mainly implemented with thin oxide devices.
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