发明名称 Numerically-controlled phase-lock loop with input timing reference-dependent ratio adjustment
摘要 A numerically-controlled phase-lock loop with input clock dependent ratio adjustment provides for narrower-bandwidth loops that lock to a wide range of frequencies and/or operation with an absent or degraded input timing reference. A timing reference characteristic detector determines an input frequency range of the input timing reference signal, the data type of the timing reference, and/or whether a timing reference signal of sufficient quality is present. A numerically controlled oscillator is controlled by a numeric ratio that is adjusted to provide the desired clock frequency output in conformity with the detected frequency range and/or data type. If the timing reference signal is absent or degraded, then the numeric ratio can be set to a fixed value or a local timing reference can be applied in order to generate the desired clock output frequency.
申请公布号 US7746972(B1) 申请公布日期 2010.06.29
申请号 US20070689729 申请日期 2007.03.22
申请人 CIRRUS LOGIC, INC. 发明人 MELANSON JOHN L.;YOU ZHONG;WOODFORD SCOTT ALLAN;GREEN STEVEN RANDALL
分类号 H03D3/24 主分类号 H03D3/24
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