发明名称 |
SET ULG CIRCUIT AND METHOD FOR CONTROLLING SINGLE ELECTRON TRANSISTOR DRAIN VOLTAGE |
摘要 |
PURPOSE: A single electron transistor-universal literal gate(SET ULG) circuit and a method for controlling the same are provided to maintain the coulomb blockade property in the drain voltage of a single transistor by commonly connecting the single transistor and the gate node of a MOSFET. CONSTITUTION: A first MOSFET, which comprises a gate node and a source node, is provided with a power source due to a drain node. A first single electron transistor(SET1) is connected to the source node of the first MOSFET(M1), and a gate input voltage is supplied to the gate. A second MOSFET(M2) is connected to the gate node of the first MOSFET. A second single electron transistor(SET2), which comprises an input gate and a side gate, is connected to the source node of the second MOSFET. The drain voltage of the first single electron transistor is controlled using the second MOSFET and the second single electron transistor. |
申请公布号 |
KR20100070600(A) |
申请公布日期 |
2010.06.28 |
申请号 |
KR20080129221 |
申请日期 |
2008.12.18 |
申请人 |
CHUNGBUK NATIONAL UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION |
发明人 |
KYE, HUN WOO;SONG, BOK NAM;CHOI, JUNG BUM |
分类号 |
H03K19/003;H03K19/00 |
主分类号 |
H03K19/003 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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