PURPOSE: A semiconductor stacked package is provided to enhance electrical reliability by comprising a rearranged wiring layer between stacked semiconductor chips in order to shorten the length of a wire in a wire bonding process. CONSTITUTION: A first semiconductor chip(110) is mounted on a printed circuit board. A second semiconductor chip(120) is mounted on the printed circuit board, parallel with the first semiconductor chip. A first rearranged wiring layer(140) is arranged on the first semiconductor chip. A second rearranged wiring layer(150) is arranged on the second semiconductor chip. A third semiconductor chip(130) is electrically connected to the first rearranged wiring layer and the second rearranged wiring layer.
申请公布号
KR20100068650(A)
申请公布日期
2010.06.24
申请号
KR20080127079
申请日期
2008.12.15
申请人
SAMSUNG ELECTRO-MECHANICS CO., LTD.
发明人
PARK, SEUNG WOOK;KIM, JIN GU;BAEK, JONG HWAN;LEE, JONG YUN;JEON, HYUNG JIN;KWEON YOUNG DO