| 摘要 |
A multi-stage recursive sample rate converter (“SRC”) typically embodied as digital signal processor provides for an efficient structure for converting digital audio samples at one frequency, such as 48 kHz, to another frequency, such as 44.1 kHz. A parameter codebook comprising memory stores parameters used at a plurality of stages by the SRC. For each stage, a controller coordinates the SRC to use the appropriate set of parameters from the codebook, process an input audio sample stream, and store the intermediate results in a buffer. The controller then causes the intermediate results to be processed again as input to the SRC in a subsequent stage of processing using a different set of parameters. The process is repeated until all stages are completed, and the final results are the output digital audio data stream at the desired sampling rate.
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