| 摘要 |
The present invention relates to a memory accessing circuit, which is for accessing a memory circuit with 2N impedance states. The memory accessing circuit includes a testing signal generating circuit, for generating a testing signal by detecting the impedance state of the memory circuit; a reference signal generating circuit, for generating 2N−1 reference signals by detecting the impedance states of a reference circuit having 2N−1 impedance paths; a median signal generating circuit, for generating (2N−1)−1, median signals by receiving the 2N−1 reference signals; and a comparing circuit, for comparing the testing signal and the (2N−1) median signals. The present invention further provides a memory accessing method thereof.
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