发明名称 TUNING VIA FACET WITH MINIMAL RIE LAG
摘要 A method for designing an etch recipe is provided. An etch is performed, comprising providing an etch gas with a set halogen to carbon ratio, forming a plasma from the etch gas, and etching trenches over via. Via faceting is measured. The halogen to carbon ratio is reset according to the measured via faceting, where the halogen to carbon ratio is increased if too much faceting is measured and the halogen to carbon ratio is decreased if too little faceting is measured. The previous steps are repeated until a desired amount of faceting is obtained.
申请公布号 KR20100065157(A) 申请公布日期 2010.06.15
申请号 KR20107006110 申请日期 2008.09.10
申请人 LAM RESEARCH CORPORATION 发明人 SIRARD STEPHEN;NAGAI MIKIO;TAKESHITA KENJI;SRIVATSAN SRIDHARAN;KO, JUNG MIN
分类号 H01L21/3065 主分类号 H01L21/3065
代理机构 代理人
主权项
地址