| 摘要 |
FIELD: information technologies. ^ SUBSTANCE: decoding device for codes with parity check of low density includes generator (11) of variable message for verification and generator (12) of verification message for variable. Generator of variable message for verification includes block (32) of variable processing units for verification, provided with summator (41), which is configured between registers (31), corresponding to places '1' in verification matrix. Generator (12) of verification message for variable includes block (62) of verification processing units for variable, provided with comparator, between registers (61), corresponding to places '1' in verification matrix. ^ EFFECT: device of decoding for codes with parity check of low density is simple in configuration and is able to perform high-speed processing without application of RAM, without necessity to perform complex control operations. ^ 24 cl, 12 dwg |
