发明名称 |
Power aware software pipelining for hardware accelerators |
摘要 |
Forming a plurality of pipeline orderings, each pipeline ordering comprising one of a sequential, a parallel, or a sequential and parallel combination of a plurality of stages of a pipeline, analyzing the plurality of pipeline orderings to determine a total power of each of the orderings, and selecting one of the plurality of pipeline orderings based on the determined total power of each of the plurality of pipeline orderings.
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申请公布号 |
US2010146314(A1) |
申请公布日期 |
2010.06.10 |
申请号 |
US20100704015 |
申请日期 |
2010.02.11 |
申请人 |
GABOR RON;JIANG HONG;NAVEH ALON;RAJWAN DORON;VARGA JAMES;YEARIM GADY;YOSEF YUVAL |
发明人 |
GABOR RON;JIANG HONG;NAVEH ALON;RAJWAN DORON;VARGA JAMES;YEARIM GADY;YOSEF YUVAL |
分类号 |
G06F1/32;G06F1/26;G06F9/30;G06F9/38 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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