| 发明名称 |
Post last wiring level inductor using patterned plate process |
| 摘要 |
A method of a semiconductor device. A substrate is provided. At least one metal wiring level is within the substrate. An insulative layer is deposited on a surface of the substrate. An inductor is formed within the insulative layer using a patterned plate process. A wire bond pad is formed within the insulative layer, wherein at least a portion of the wire bond pad is substantially co-planar with the inductor.
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| 申请公布号 |
US7732294(B2) |
申请公布日期 |
2010.06.08 |
| 申请号 |
US20080170464 |
申请日期 |
2008.07.10 |
| 申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
CHINTHAKINDI ANIL KUMAR;COOLBAUGH DOUGLAS DUANE;FLORKEY JOHN EDWARD;GAMBINO JEFFREY PETER;HE ZHONG-XIANG;STAMPER ANTHONY KENDALL;VAED KUNAL |
| 分类号 |
H01L21/20 |
主分类号 |
H01L21/20 |
| 代理机构 |
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代理人 |
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