REFERENCE VOLTAGE GENERATION CIRCUIT AND BIAS CIRCUIT

摘要

PURPOSE: A reference voltage generation circuit and a bias circuit are provided to suppress a leak current and gain change due to a process gap by using a enhancement mode FET. CONSTITUTION: A gate of a first depletion mode FET(F1) is connected to an enable terminal. A drain of the first depletion mode FET is connected to a current source terminal. A drain of the second depletion mode FET(F2) is connected to the source of the first depletion mode FET. A first resistor(R1) is connected between the source and the gate of the second depletion mode FET. The collector of the first bipolar transistor(Tr1) is connected to the other end of the first resistor. The collector of the second bipolar transistor(Tr2) is connected to the source of the first depletion mode FET. The base is connected to the source of the second depletion mode FET. The base and collector of the third bipolar transistor(Tr3) are connected to the base of the first bipolar transistor and emitter of the second bipolar transistor.