发明名称 APPLYING NEGATIVE GATE VOLTAGE TO WORDLINES ADJACENT TO WORDLINE ASSOCIATED WITH READ OR VERIFY TO REDUCE ADJACENT WORDLINE DISTURB
摘要 Systems, methods, and devices that facilitate applying a predefined negative gate voltage to wordlines adjacent to a selected wordline associated with a memory cell selected during a read or verify operation to facilitate reducing adjacent wordline disturb are presented. A memory component can comprise an optimized operation component that can apply a predefined negative gate voltage to wordlines adjacent to a selected wordline associated with a memory cell selected for a read or verify operation, based at least in part on predefined operation criteria, to facilitate reducing adjacent wordline disturb in the selected memory cell to facilitate reducing a shift in the voltage threshold and maintain a desired operation window. The optimized operation component optionally can include an evaluator component that can facilitate determining whether a negative gate voltage applied to adjacent wordlines is to be adjusted to facilitate reducing adjacent wordline disturb below a predetermined threshold amount.
申请公布号 US2010128521(A1) 申请公布日期 2010.05.27
申请号 US20080275663 申请日期 2008.11.21
申请人 SPANSION LLC 发明人 MIZUGUCHI YUJI;RANDOLPH MARK W.;HAMILTON DARLENE GAY;HE YI;LIU ZHIZHENG;LIN YANXIA (EMMA);YI XIANMIN;KATHAWALA GULZAR;JOSHI AMOL RAMESH;CHANG KUO-TUNG;RUNNION EDWARD FRANKLIN;LEE SUNG-CHUL;CHUNG SUNG-YONG;LIU YANXIANG;SUN YU
分类号 G11C16/04 主分类号 G11C16/04
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