发明名称 |
Method and apparatus for secure scan testing |
摘要 |
A processor, scan controller, and method for protecting sensitive information from electronic hacking is disclosed. To maintain the security of the sensitive data present in a processor, the scan controller denies access to the scan chain until data is cleared from scan-observable portions of the processor, then clears the scan chain again prior to exiting test mode and resuming normal operation. Clearing or otherwise modifying data stored in the scan-observable portions of a processor when transitioning to and/or from a test mode will prevent unauthorized personnel from simply shifting secure data out of the scan chain, and from pre-loading data into the scan chain prior to normal operation in an attempt to set sensitive state information.
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申请公布号 |
US7725788(B2) |
申请公布日期 |
2010.05.25 |
申请号 |
US20070627229 |
申请日期 |
2007.01.25 |
申请人 |
FREESCALE SEMICONDUCTOR, INC. |
发明人 |
TKACIK THOMAS;SPITTAL, JR. JOHN E.;LUTZ JONATHAN;CASE LAWRENCE;HARDY DOUGLAS;REDMAN MARK;SCHMIDT GREGORY;TUGENBERG STEVEN;FITZSIMMONS MICHAEL D.;CARDER DARRELL L. |
分类号 |
G01R31/28;G01R31/317;G01R31/3185;G06F21/00 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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