发明名称 |
Method and apparatus for computing matrix transformations |
摘要 |
A method and apparatus for performing matrix transformations including multiply-add operations and byte shuffle operations on packed data in a processor. In one embodiment, two rows of content byte elements are shuffled to generate a first and second packed data respectively including elements of a first two columns and of a second two columns. A third packed data including sums of products is generated from the first packed data and elements from two rows of a matrix by a multiply-add instruction. A fourth packed data including sums of products is generated from the second packed data and elements from two more rows of the matrix by another multiply-add instruction. Corresponding sums of products of the third and fourth packed data are then summed to generate two rows of a product matrix. Elements of the product matrix may be generated in an order that further facilitates a second matrix multiplication.
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申请公布号 |
US7725521(B2) |
申请公布日期 |
2010.05.25 |
申请号 |
US20030683186 |
申请日期 |
2003.10.10 |
申请人 |
INTEL CORPORATION |
发明人 |
CHEN YEN-KUANG;LI ERIC Q.;MACY, JR. WILLIAM W.;YEUNG MINERVA M. |
分类号 |
G06F7/38;G06F9/30;G06F9/302;G06F9/308;G06F9/315;G06F9/38;G06F15/00;G06F17/14 |
主分类号 |
G06F7/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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