| 摘要 |
PURPOSE: An integrated circuit and a semiconductor memory device are provided to reduce current consumption due to the toggling of a clock signal by controlling a clock signal during activation period of a clock control signal. CONSTITUTION: A clock control signal generating part(210) generates a clock control signal which include an activation period corresponding to an enable period of a data input buffer. A clock transferring part(220) provides a clock signal to a write clock pass during the activation period of the clock control signal. The clock control signal generating part delays deactivation time point of the data input buffer enable signal according to the data input buffer enable signal. The clock control signal generating part generates the clock control signal which has an activation period which is extended than the data input buffer enable signal. The clock control signal is deactivated after an input data signal outputted from the data input buffer is aligned.
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