发明名称 RESISTANCE VARIABLE MEMORY APPARATUS
摘要 A resistance variable memory apparatus (10) of the present invention comprises a resistance variable element (1) which is switched to a high-resistance state when a voltage exceeds a first voltage and is switched to a low-resistance state when the voltage exceeds a second voltage, a controller (4), a voltage restricting active element (2) which is connected in series with the resistance variable element (1); and a current restricting active element which is connected in series with the resistance variable element (1) via the voltage restricting active element (2), and the controller (4) is configured to control the current restricting active element (3) so that a product of a current and a first resistance value becomes a first voltage or larger and to control the voltage restricting active element (2) so that the voltage between electrodes becomes smaller than a second voltage when the element is switched to the high-resistance state, while the controller (4) is configured to control the current restricting active element (3) so that an absolute value of a product of the current and the second resistance value becomes the second voltage or larger and an absolute value of a product of the current and the first resistance value becomes smaller than the first voltage, when the element is switched to the low-resistance state.
申请公布号 US2010110767(A1) 申请公布日期 2010.05.06
申请号 US20080529103 申请日期 2008.03.12
申请人 KATOH YOSHIKAZU;SHIMAKAWA KAZUHIKO 发明人 KATOH YOSHIKAZU;SHIMAKAWA KAZUHIKO
分类号 G11C11/00;G11C5/14 主分类号 G11C11/00
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