发明名称 ELECTRONIC DEVICE, INTEGRATED CIRCUIT AND METHOD THEREFOR
摘要 A wireless communication device comprises a number of sub-systems and clock generation logic arranged to generate at least one clock signal to be applied to the number of sub-systems. One of the number of sub-systems comprises sampling logic for receiving input data and performing initial sampling on an input data bit using multiple separated phases of a clock period of the at least one clock signal applied to the sampling logic thereby producing multiple phase separated sampled outputs of the input data bit. The sampling logic is configured to perform a number of re-sampling operations on the multiple phase separated sampled outputs at a number of intermediate phases thereby producing multiple phase separated intermediate sampled outputs prior to performing a final sample of the multiple phase separated intermediate sampled outputs at a single phase of the at least one clock signal to produce a sampled input data signal.
申请公布号 US2010111154(A1) 申请公布日期 2010.05.06
申请号 US20070522043 申请日期 2007.01.09
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 KELLEHER PAUL;MCSWINEY DIARMUID;O'KEEFFE CONOR;QUIROGA EMILIO;SONI SAMIR
分类号 H04L27/00;H04B17/00 主分类号 H04L27/00
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