发明名称 METHODS OF FORMING FINE PATTERNS IN INTEGRATED CIRCUIT DEVICES
摘要 A method of fabricating an integrated circuit device includes forming first and second mask structures on respective first and second regions of a feature layer. Each of the first and second mask structures includes a dual mask pattern and an etch mask pattern thereon having an etch selectivity relative to the dual mask pattern. The etch mask patterns of the first and second mask structures are isotropically etched to remove the etch mask pattern from the first mask structure while maintaining at least a portion of the etch mask pattern on the second mask structure. Spacers are formed on opposing sidewalls of the first and second mask structures. The first mask structure is selectively removed from between the spacers in the first region using the portion of the etch mask pattern on the second mask structure as a mask to define a first mask pattern including the opposing sidewall spacers with a void therebetween in the first region, and a second mask pattern including the opposing sidewall spacers with the second mask structure therebetween in the second region. The feature layer may be patterned using the first mask pattern as a mask to define a first feature on the first region, and using the second mask pattern as a mask to define a second feature on the second region having a greater width than the first feature.
申请公布号 US2010096719(A1) 申请公布日期 2010.04.22
申请号 US20090418023 申请日期 2009.04.03
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE YOUNG-HO;PARK JAE-KWAN;SIM JAE-HWANG;PARK SANG-YONG
分类号 H01L29/06;H01L21/3065;H01L21/3205;H01L21/336;H01L21/76;H01L21/762;H01L21/768;H01L21/8247;H01L23/544;H01L27/10;H01L27/115;H01L29/788;H01L29/792 主分类号 H01L29/06
代理机构 代理人
主权项
地址