发明名称 Memory having improved power design
摘要 A memory includes a plurality of cells arranged in a matrix having a plurality of rows and a plurality of columns, wherein each cell is capable of storing a bit. Each cell is coupled between a first power supply node that receives a power supply voltage and a second power supply node that receives a second voltage. A plurality of word lines are associated with the memory cells and supplied by a third voltage in read or write operation. The third voltage is a suppressed power supply voltage. The second voltage is negative in read operation and positive in write operation.
申请公布号 US7701755(B2) 申请公布日期 2010.04.20
申请号 US20070619103 申请日期 2007.01.02
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 CHEN YEN-HUEI;LIAO HUNG-JEN;CHEN KUN-LUNG;LIN YUNG-LUNG;WANG DAO-PING
分类号 G11C11/00 主分类号 G11C11/00
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