发明名称 |
Memory with high speed sensing |
摘要 |
A memory including a data line, a sense amplifier, and an array of memory cells. The memory includes a transistor for coupling the data line to memory cells of the array for reading. The transistor is biased at a voltage that is higher than a voltage that the data line is biased during precharging. The transistor is part of a regulation circuit. The regulation circuit includes transistors with a higher dielectric breakdown voltage than transistors of the sense amplifier.
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申请公布号 |
US7701785(B2) |
申请公布日期 |
2010.04.20 |
申请号 |
US20080144332 |
申请日期 |
2008.06.23 |
申请人 |
FREESCALE SEMICONDUCTOR, INC. |
发明人 |
SANJEEVARAO PADMARAJ;AKHTER TAHMINA;CHRUDIMSKY DAVID W. |
分类号 |
G11C7/00 |
主分类号 |
G11C7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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