| 摘要 |
A random number generation circuit has a ring oscillator which has odd number of inverting amplifiers connected in ring shape, a delay control circuit which generates a predetermined clock signal by delaying a reference clock signal, a first sampling circuit which samples an oscillation signal generated by the ring oscillator with the predetermined clock signal, a first logical equalization circuit which equalizes occurrence frequency of “0” and “1” of a sampling signal sampled by the first sampling circuit, a linear feedback shift register (LFSR) which generates random serial data based on an output signal of the first logical equalization circuit, and a serial-parallel converter which generates random parallel data used for controlling a delay amount of the delay control circuit by converting the random serial data from serial to parallel.
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