发明名称 SUBSTRATE WITH EMBEDDED PATTERNED CAPACITANCE
摘要 A process for forming a laminate with capacitance and the laminate formed thereby. The process includes the steps of providing a substrate and laminating a conductive foil on the substrate wherein the foil has a dielectric. A conductive layer is formed on the dielectric. The conductive foil is treated to electrically isolate a region of conductive foil containing the conductive layer from additional conductive foil. A cathodic conductive couple is made between the conductive layer and a cathode trace and an anodic conductive couple is made between the conductive foil and an anode trace.
申请公布号 WO2010014580(A3) 申请公布日期 2010.04.15
申请号 WO2009US51919 申请日期 2009.07.28
申请人 KEMET ELECTRONICS CORPORATION;MOTOROLA, INC.;PRYMAK, JOHN, D.;STOLARSKI, CHRIS;MELODY, ALETHIA;CHACKO, ANTONY, P.;DUNN, GREGORY, J. 发明人 PRYMAK, JOHN, D.;STOLARSKI, CHRIS;MELODY, ALETHIA;CHACKO, ANTONY, P.;DUNN, GREGORY, J.
分类号 H01G4/40;H01G4/12 主分类号 H01G4/40
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