发明名称 Lock system and method for interpolator based receivers
摘要 A tracking loop of an interpolator based receiver includes clock elements that generate a plurality of clocks to sample a signal from a remote transmitter. The tracking loop includes samplers and voter elements that sample the signal with the clocks and generate samples that comparatively indicate a phase relationship between the signal and the clocks. Based on the comparison of the samples in the samplers and voter elements, the tracking loop either sends phase-shift signals to the clock elements to shift the phase of the clocks to match the phase of the signal, or sends a phase-flip signal to the clock elements to flip the clocks if the phase relationship between the signal and the clocks is about 180°. Once a phase match between the clocks and the signal is established, the tracking loop remains phase locked with the signal and provides a recovered signal.
申请公布号 US7697651(B2) 申请公布日期 2010.04.13
申请号 US20040880833 申请日期 2004.06.30
申请人 INTEL CORPORATION 发明人 ABHAYAGUNAWARDHANA CHAMATH;MAHMUD ARIF;RAHBAR KIANOUSH
分类号 H03D3/24 主分类号 H03D3/24
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