发明名称 |
Multiple dual bit memory integrated circuit system |
摘要 |
A multiple dual bit integrated circuit system is provided that includes forming first address lines in a semiconductor substrate and forming a charge-trapping layer over the semiconductor substrate. A semiconductor layer is formed over the charge-trapping layer and second address lines are formed in the semiconductor layer to form a plurality of dual bit locations.
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申请公布号 |
US7692236(B1) |
申请公布日期 |
2010.04.06 |
申请号 |
US20050059139 |
申请日期 |
2005.02.15 |
申请人 |
SPANSION LLC |
发明人 |
BRENNAN MICHAEL;PARK JAEYONG;SHIRAIWA HIDEHIKO;TORII SATOSHI |
分类号 |
H01L23/62 |
主分类号 |
H01L23/62 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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