发明名称 BIT-ERASING ARCHITECTURE FOR SEEK-SCAN PROBE (SSP) MEMORY STORAGE
摘要 An apparatus comprising a substrate, a heater formed on the substrate, and a phase-change layer formed on the heater. The heater comprises a heater layer and first and second electrodes electrically coupled to the heater layer. A process comprising forming a heater on a substrate and forming a phase-change layer on the heater. The heater comprises a heater layer and first and second electrodes electrically coupled to the heater layer.
申请公布号 US2010080051(A1) 申请公布日期 2010.04.01
申请号 US20090631265 申请日期 2009.12.04
申请人 MA QING;RAO VALLURI R;CHOU TSUNG-KUAN ALLEN 发明人 MA QING;RAO VALLURI R.;CHOU TSUNG-KUAN ALLEN
分类号 G11C11/56;H01L45/00 主分类号 G11C11/56
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