发明名称 ADDRESS DECODING APPARTUS FOR SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE: An address decoding apparatus of a semiconductor memory device is provided to reduce off-leakage current consumption by reducing the number of idle drivers. CONSTITUTION: Decoding units(30,32,34) outputs a first, a second and a third pre-decoding signal by decoding a column address. A first and a second driving unit output the first and the second pre-decoding signal. A third driving unit latches the third pre-decoding signal by a column address enable signal. A switching unit(50) is connected to the output terminal of the third driving unit. A fourth driving unit generates a control signal controlling the switching unit by decoding the output signal of the first and the second driving unit.
申请公布号 KR20100033184(A) 申请公布日期 2010.03.29
申请号 KR20080092240 申请日期 2008.09.19
申请人 HYNIX SEMICONDUCTOR INC. 发明人 YOU, JUNG TAEK
分类号 G11C8/10;G11C7/10 主分类号 G11C8/10
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