发明名称 |
Complementary Energy Path Adiabatic Logic |
摘要 |
A complementary energy path adiabatic logic (CEPAL) includes an evaluation network and a power clock network. The evaluation network is a logic circuit composed of P-type MOS transistors and N-type MOS transistors. The power clock network includes a P-type and N-type MOS transistors and additional P-type and N-type MOS transistors, with each of the transistors involved in the power clock network acting as an active diode.
|
申请公布号 |
US2010073029(A1) |
申请公布日期 |
2010.03.25 |
申请号 |
US20080236571 |
申请日期 |
2008.09.24 |
申请人 |
HONG CI-TONG;GONG CIHUN-SIYONG;SU CHUN-HSIEN;SHIUE MUH-TIAN;YAO KAI-WEN |
发明人 |
HONG CI-TONG;GONG CIHUN-SIYONG;SU CHUN-HSIEN;SHIUE MUH-TIAN;YAO KAI-WEN |
分类号 |
H03K19/0948;H03K19/096 |
主分类号 |
H03K19/0948 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|