| 摘要 |
A voltage regulation circuit includes a power stage for generating a regulated output voltage responsive to an input voltage and at least one PWM signal. A voltage divider circuit is connected to the output of the power stage and generates a feedback voltage. First circuitry generates the at least one PWM signal responsive to a voltage error signal, a filtered output voltage signal and a ramp voltage signal. The filtered output voltage is used for substantially removing loop gain change caused by the voltage divider circuit. A voltage compensation circuit generates the voltage error signal responsive to a feedback voltage and a reference voltage.
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