发明名称 MEMORY ARCHITECTURE HAVING TWO INDEPENDENTLY CONTROLLED VOLTAGE PUMPS
摘要 In embodiments described herein, a memory architecture has an array of non-voaltile memory cells and a pair of independently controlled voltage pumps. The pair of voltage pumps is coupled for supplying both positive and negative voltage biases to the memory array during program and erase operations, such that a sum of the magnitudes of the positive and negative voltage biases is applied across a storage node of an accessed memory cell.
申请公布号 WO2010033880(A2) 申请公布日期 2010.03.25
申请号 WO2009US57593 申请日期 2009.09.18
申请人 CYPRESS SEMICONDUCTOR CORPORATION;HIROSE, RYAN;JENNE, FREDRICK;SRINIVASARAGHAVAN, VIJAY;KOUZNETSOV, IGOR;RUTHS, PAUL;ZONTE, CRISTINEL;GEORGESCU, BOGDAN;GITLAN, LEONARD;MYERS, JAMES 发明人 HIROSE, RYAN;JENNE, FREDRICK;SRINIVASARAGHAVAN, VIJAY;KOUZNETSOV, IGOR;RUTHS, PAUL;ZONTE, CRISTINEL;GEORGESCU, BOGDAN;GITLAN, LEONARD;MYERS, JAMES
分类号 G11C16/06;G11C5/14 主分类号 G11C16/06
代理机构 代理人
主权项
地址