发明名称 Semiconductor device and method of fabricating thereof capable of reducing a shallow trench isolation stress influence by utilizing layout pattern designs
摘要 Provided is a semiconductor device. The semiconductor device includes a semiconductor substrate, a plurality of contact metals, and a gate electrode. The semiconductor substrate has an active region and a dummy active region, and a plurality of contact metals are formed in the active region. A gate electrode is located between the contact metals in the active region. A first distance between the active region and the dummy active region, and a second distance between an edge of the contact metal and an edge of the active region are set such that a channel characteristic of the active region is improved.
申请公布号 US7683401(B2) 申请公布日期 2010.03.23
申请号 US20060519361 申请日期 2006.09.12
申请人 DONGBU ELECTRONICS CO., LTD. 发明人 JUNG MYUNG JIN
分类号 H01L27/088 主分类号 H01L27/088
代理机构 代理人
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