发明名称 METHOD FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT APPARATUS
摘要 PROBLEM TO BE SOLVED: To suppress abnormal shape formation on a recess bottom when forming the recess by applying etching treatment onto an insulating membrane mainly including organosiloxane. SOLUTION: The method for manufacturing the semiconductor integrated circuit apparatus builds an embedded wiring structure by embedding a conductive membrane in the recess 4 such as groove, hole, or the like formed in the organic insulating membrane 2 mainly including organosiloxane and forming an interlayer insulating membrane. After a photoresist membrane 3 is formed on the organic insulating membrane 2, when the recess 4 such as groove, hole, or the like is formed in the organic insulating membrane 2 by utilizing the photoresist membrane 3 as an etching mask, the recess 4 is formed by applying plasma dry etching treatment utilizing CF-based gas/N<SB>2</SB>/Ar gas in order to suppress abnormal shape formation on the bottom of the recess 4. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010062587(A) 申请公布日期 2010.03.18
申请号 JP20090280897 申请日期 2009.12.10
申请人 RENESAS TECHNOLOGY CORP 发明人 UNO SHOICHI;MAEKAWA ATSUSHI;YUNOGAMI TAKASHI;TAGO KAZUATSU;NOJIRI KAZUO;MACHIDA SHUNTARO;TOKUNAGA TAKAFUMI
分类号 H01L21/3065;H01L21/311;H01L21/312;H01L21/44;H01L21/4763;H01L21/768;H01L23/52;H01L29/40 主分类号 H01L21/3065
代理机构 代理人
主权项
地址